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| author | Adam Carpenter <53hornet@gmail.com> | 2019-03-27 15:32:37 -0400 |
|---|---|---|
| committer | Adam Carpenter <53hornet@gmail.com> | 2019-03-27 15:32:37 -0400 |
| commit | 67cdcc2e12118becb823e20a40cc2687f2b8425a (patch) | |
| tree | ed92c3234b89079e6d4cf36f5e80c5ffa79def48 /meap/meap-code/ch5/ch5-cpu3 | |
| parent | e25482fca375d318a39c3b54db396b0db6e0b263 (diff) | |
| download | learning-rust-67cdcc2e12118becb823e20a40cc2687f2b8425a.tar.xz learning-rust-67cdcc2e12118becb823e20a40cc2687f2b8425a.zip | |
Started Rust in Action MEAP.
Diffstat (limited to 'meap/meap-code/ch5/ch5-cpu3')
| -rw-r--r-- | meap/meap-code/ch5/ch5-cpu3/Cargo.lock | 4 | ||||
| -rw-r--r-- | meap/meap-code/ch5/ch5-cpu3/Cargo.toml | 6 | ||||
| -rw-r--r-- | meap/meap-code/ch5/ch5-cpu3/src/main.rs | 88 |
3 files changed, 98 insertions, 0 deletions
diff --git a/meap/meap-code/ch5/ch5-cpu3/Cargo.lock b/meap/meap-code/ch5/ch5-cpu3/Cargo.lock new file mode 100644 index 0000000..6262526 --- /dev/null +++ b/meap/meap-code/ch5/ch5-cpu3/Cargo.lock @@ -0,0 +1,4 @@ +[[package]]
+name = "ch5-cpu3"
+version = "0.1.0"
+
diff --git a/meap/meap-code/ch5/ch5-cpu3/Cargo.toml b/meap/meap-code/ch5/ch5-cpu3/Cargo.toml new file mode 100644 index 0000000..1f964df --- /dev/null +++ b/meap/meap-code/ch5/ch5-cpu3/Cargo.toml @@ -0,0 +1,6 @@ +[package]
+name = "ch5-cpu3"
+version = "0.1.0"
+authors = ["Tim McNamara <code@timmcnamara.co.nz>"]
+
+[dependencies]
diff --git a/meap/meap-code/ch5/ch5-cpu3/src/main.rs b/meap/meap-code/ch5/ch5-cpu3/src/main.rs new file mode 100644 index 0000000..903ef23 --- /dev/null +++ b/meap/meap-code/ch5/ch5-cpu3/src/main.rs @@ -0,0 +1,88 @@ +struct CPU {
+ registers: [u8; 16],
+ position_in_memory: usize,
+ memory: [u8; 4096],
+ stack: [u16; 16],
+ stack_pointer: usize,
+}
+
+impl CPU {
+ fn run(&mut self) {
+ loop {
+ let op_byte1 = self.memory[self.position_in_memory] as u16;
+ let op_byte2 = self.memory[self.position_in_memory + 1] as u16;
+ let opcode = op_byte1 << 8 | op_byte2;
+
+ let x = ((opcode & 0x0F00) >> 8) as u8;
+ let y = ((opcode & 0x00F0) >> 4) as u8;
+ let op_minor = (opcode & 0x000F) as u8;
+ let addr = opcode & 0x0FFF;
+
+ self.position_in_memory += 2;
+
+ match opcode {
+ 0x0000 => { return; },
+ 0x00EE => { self.ret(); },
+ 0x2000...0x2FFF => { self.call(addr); },
+ 0x8000...0x8FFF => {
+ match op_minor {
+ 4 => { self.add_xy(x, y); }
+ _ => { unimplemented!("opcode: {:04x}", opcode); },
+ }
+ },
+ _ => unimplemented!("opcode {:04x}", opcode),
+ }
+ }
+ }
+
+ fn call(&mut self, addr: u16) {
+ let sp = self.stack_pointer;
+ let stack = &mut self.stack;
+
+ if sp > stack.len() {
+ panic!("Stack overflow!")
+ }
+
+ stack[sp] = self.position_in_memory as u16;
+ self.stack_pointer += 1;
+ self.position_in_memory = addr as usize;
+ }
+ fn ret(&mut self) {
+ if self.stack_pointer == 0 {
+ panic!("Stack underflow");
+ }
+
+ self.stack_pointer -= 1;
+ self.position_in_memory = self.stack[self.stack_pointer] as usize;
+ }
+
+ fn add_xy(&mut self, x: u8, y: u8) {
+ self.registers[x as usize] += self.registers[y as usize];
+ }
+}
+
+fn main() {
+ let mut cpu = CPU {
+ registers: [0; 16],
+ memory: [0; 4096],
+ position_in_memory: 0,
+ stack: [0; 16],
+ stack_pointer: 0,
+ };
+
+ cpu.registers[0] = 5;
+ cpu.registers[1] = 10;
+
+ cpu.memory[0x000] = 0x21; cpu.memory[0x001] = 0x00;
+ cpu.memory[0x002] = 0x21; cpu.memory[0x003] = 0x00;
+
+ cpu.memory[0x100] = 0x80; cpu.memory[0x101] = 0x14;
+ cpu.memory[0x102] = 0x80; cpu.memory[0x103] = 0x14;
+ cpu.memory[0x104] = 0x00; cpu.memory[0x105] = 0xEE;
+
+ cpu.run();
+
+ assert_eq!(cpu.registers[0], 45);
+
+ println!("5 + (10 * 2) + (10 * 2) = {}", cpu.registers[0]);
+}
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